Abstract

In Part I of this article, we present a novel device, i.e., a cross-coupled gated tunneling diode (XTD), which exhibits negative differential resistance (NDR) with peak-to-valley current ratios (PVCRs) exceeding 105. In this part of this article, based on the XTD, we introduce a compact static random access memory (SRAM) cell using a one-transistor and two-XTD (1T-2X) design. The layout of the SRAM cell as well as a detailed analysis of the cell behavior and SRAM array performance are presented. In particular, our simulation results show that the 1T-2X SRAM cell can achieve <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$70\times $ </tex-math></inline-formula> improvement in standby power with ~ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$8\times $ </tex-math></inline-formula> area reduction compared to standard CMOS SRAM.

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