Abstract

The prolonged and aggressive nature of scaling to augment the performance of silicon integrated circuits (ICs) and the technical challenges and costs associated with this has led to the study of alternative materials that can use processing schemes analogous to semiconductor manufacturing. We examine the status of recent efforts to develop active device elements using nontraditional lithography in this article, with a specific focus on block copolymer (BCP) feature patterning. An elegant route is demonstrated using directed self-assembly (DSA) of BCPs for the fabrication of aligned tungsten trioxide (WO3) nanowires towards nanoelectronic device application. The strategy described avoids conventional lithography practices such as optical patterning as well as repeated etching and deposition protocols and opens up a new approach for device development. Nanoimprint lithography (NIL) silsesquioxane (SSQ)-based trenches were utilized in order to align a cylinder forming poly(styrene)-block-poly(4-vinylpyridine) (PS-b-P4VP) BCP soft template. We outline WO3 nanowire fabrication using a spin-on process and the symmetric current-voltage characteristics of the resulting Ti/Au (5 nm/45 nm) contacted WO3 nanowires. The results highlight the simplicity of a solution-based approach that allows creating active device elements and controlling the chemistry of specific self-assembling building blocks. The process enables one to dictate nanoscale chemistry with an unprecedented level of sophistication, forging the way for next-generation nanoelectronic devices. We lastly outline views and future research studies towards improving the current platform to achieve the desired device performance.

Highlights

  • Portable electronic devices with enhanced connectivity are ubiquitous in modern everyday life

  • Cheap, versatile, and compatible strategies such as bottom-up routes are of significant focus for next-generation nanoelectronic devices

  • We describe the fabrication of well-ordered and aligned tungsten trioxide nanowires templated from a PS-b-P4VP Block copolymer (BCP)

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Summary

Introduction

Portable electronic devices with enhanced connectivity are ubiquitous in modern everyday life. A major integration hurdle for metal oxide/inorganic fabrication strategies (e.g., vapor-liquid-solid nanowire growth methods) to overcome is their general incompatibility with current silicon technology practices. In this regard, methods that can achieve a trade-off between a material’s superior performance and possess minor risk for industry integration are advantageous. 3S.cSaclaelbeabrasrcsocrorrersepsopnodndtoto505000nmnm(m(maianinimimagaeg)e)anandd101000nnmm (i(ninseset)t,),rreessppeecctitviveelyly..CCoorrrreessppoonnddiinngg XXPPSS aannaallyyssiiss ooff nnaannoowwiirreess sshhoowwiinngg((bb))ssuurrvveeyyssppeecctrturumm, ,(c()c)WW4f 4hf higihgh-r-erseosloulutitoinoncocroerescsacna,na, nadnd(d()dO) O1s1hs ihgihg-hr-erseosloultuiotinoncocroerescsacna.n. The schematic displayed in Scheme 1 shows the process for the self-assembly of PS-b-P4VP BCP to form line patterns (Scheme 1c), followed by ethanol “activation” (Scheme 1d), and subsequent WO3 nanowire formation (Scheme 1e). Ffurutuitrfeulrefoserarrecsheasrhcohuelrds sailnsocefothceusmoentatlhsealsttuindcyluosfiotnhepcrhocaensnseilsmamateenriaabl lfeabtoriacapteledt.hTohrais ocfosualldt pprroecvuertsoobrse. eTxthreemsaelltyinfrculuitsfuiolnfosrtrraesteegarychcaenrsesninacbeleth“etrmadetitailosnaaltl”inscelmusiicoonnpdruoccteosrss,isaanmd emnaobrele attotraacptilveethfoeraatuorfessaslut cphreacsufresrororse.leTchtreicssalmt ianycbluesoiofninstterraetsetgfyorcannaneonealbecletr“otnriacds.itAiocncaels”ssteomaiwcoinddeusccotopres, oafnmdamteorriaelaslelutsriinsgpfoesastiubrleesussuicnhg aths efemrreoteallecstarlitcsinmclauysiboenotfecinhtneirqeuste.foAr sniadneoferloemctrcohnaicnsn.eAl cmceastsertioala awnaidlyesissc,okpeey opfamraamteerteiarls stoetesxipsapnodssthibeleknuoswinlgedthgee omfetthael wsaoltrkinhceluresisohnouteldchcneinqtuere.efAfosridtseofnroimmpcrhoavninngel thmeagteartieadl aenvaellyopsims,eknetyppraorcaemsse, toenrsthtoe eexvpaalunadtitohneokfnmowetlaeldcgoenotafctthse, awnodrkonhethree sshtuoduyldocfetnhteetroepffgoarttsinogn oifmmpertoavlionxgidthee1g-Datendaneovweloirpemfeeantut prersoctoesms,aoknetfihne efivealdlueaftfieocnt torfamnseitsatol rco(FnitnaFctEsT, a)ntydpoendtehveicsetus.dy of the top gating of metal oxide 1-D nanowire features to make fin field effect transistor (FinFET) type devices

Materials
Film Deposition and Nanowire Formation
Electrical Studies
Characterization
Conclusions
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