Abstract
ID9 testing is considered a powerful technique to detect bridging fau s in CMOS combinational circuits. The estimations of fault coverage, escape probability and test length are necessary to examine the effectiveness of random testing in ID,, test environment. In this paper we provide these estimates. The rsationship between expected fault coverage and escape probability, lower bound on expected fault coverage, and upper bound on test length are given. Both pseudo random (sampling with replacement) and random (sampling without replacement) test vectors are studied and exact and asymptotic formulas for fault coverage are obtained. It is observed that a very small random test set (without replacement) can provide good fault coverage of bridging faults in IDw testing.
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