Abstract

Floating wave energy converters (WECs) operating in the resonance region are strongly affected by non-linearities arising from the interaction between the waves, the WEC motion and the mooring restraints. To compute the restrained WEC motion thus requires a method which readily accounts for these effects. This paper presents a method for coupled mooring analysis using a two-phase Navier–Stokes (VOF–RANS) model and a high-order finite element model of mooring cables. The method is validated against experimental measurements of a cylindrical buoy in regular waves, slack-moored with three catenary mooring cables. There is overall a good agreement between experimental and computational results with respect to buoy motions and mooring forces. Most importantly, the coupled numerical model accurately recreates the strong wave height dependence of the response amplitude operators seen in the experiments.

Highlights

  • Accurate tools for design and numerical modelling of floating wave energy converters (WECs) are essential to the development of the wave power industry

  • The aim of this paper is to present a method for fully coupled computational fluid dynamics (CFD)-mooring analysis of moored floating objects, including a validation study

  • The convection terms were in this study modelled using a centred total variation diminishing (TVD) scheme for the momentum and a second order TVD limiter (SuperBee) for the volume fraction

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Summary

Introduction

Accurate tools for design and numerical modelling of floating wave energy converters (WECs) are essential to the development of the wave power industry. Design rules and modelling tools from the offshore industry are used when applicable, but wave power companies rely heavily on experimental tests in model scale, as well as on large scale sea trials. If the accuracy and reliability of computational models at all stages of the design cycle are increased, the desired outcome of tests and trials is more likely to be achieved. In this way an economically favourable development path can be followed, where the device performance is optimised in an early stage [2]

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