Abstract

Differential planar coupled loops are examined as a method of integrating silicon electronics with passive elements on low-loss microwave laminates. Two test structures are examined which abut planar loops on a CMOS chip to similarly sized loops on a low-loss microwave laminate. The insertion loss of a pair of the 1000times1000 mum loops was measured to be approximately 3 dB at 20 GHz, and the loss between the 700times300 mum loops was measured to be approximately 6 dB at 20 GHz

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