Abstract

This paper proposes a new structure with counter lightly doped drain (C-LDD) implantation for Multi-level cell (MLC) NOR flash memory application, aimed at reducing drain disturb. The manufacturing of C-LDD cell is fully compatible with standard floating gate flash process and no extra mask is required. Experimental results show that, by introducing C-LDD structure, the drain disturb can be successfully inhibited compared with conventional flash cell due to the optimization of drain junction doping profile. Endurance reliability is also improved when C-LDD is adopted. In addition, experiments reveal that no program degradation is observed when applying C-LDD implantation. These advantages have shown that C-LDD structure is a low cost and effective way to obtain high reliability in NOR flash memory.

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