Abstract

A cost effective, easily scalable, and application independent FPGA cluster co-processing platform for machine learning (ML) applications is proposed. The work in this paper focuses on delivering an economical platform for the researchers and developers without the knowledge of FPGAs who seek budget friendly solutions to increase the performance of their ML applications without relying on the highly expensive solutions available in the today's FPGA market. The approach consists of two main parts, with a CPU based host machine learning application and the FPGA cluster sharing the heavy workload through an Ethernet protocol. An experiment was conducted using a perceptron layer implementation on the hardware and the test results show the execution time improvements due to the utilization of the proposed cluster approach. The solution proposed is easily scalable with any FPGA platform with an Ethernet support.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call