Cosimulation of Power and Temperature Models at the SystemC/TLM for a Soft‐Core Processor

Zineb El Hariti,Kaoutar Aamali,Abdelhakim Alali,Mohamed Sadik

doi:10.1155/2020/2567915

Abstract

Nowadays, modern embedded applications are becoming more and more complex and resource demanding. Fortunately, Systems on Chip (SoC) are one of the keys used to follow their requirements that stand in need of high performance while maintaining a low‐power profile. On one hand, today, due to the limited power budget imposed by the batteries, power is the limiting factor of the logic CMOS. On the other hand, the downscaling of the technology node for 65 nm and beyond, based on the International Technology Roadmap for Semiconductors (ITRS) as a reference, has not only resulted in huge energy consumption but also increased the temperature chip. To address this challenge, designing at the system level is the suitable measure to tackle with the complexity of the Systems on Chip, aiming at having better adjustment between timing and accuracy for power and temperature estimations. We present in this paper, at the first stage, two models describing the static and dynamic power at the physical level. These models are implemented on an open virtual platform Model Power‐Consumption and Temperature in SystemC/TLM (LIBTLMPWT) based on a representative SoC architecture. At the second stage, we focus on power, especially the thermal behaviour of the chip while running three benchmarks set on the game of life application for two different technology nodes.

Highlights

Today, the demand for advancing the type of technology we use is high as people’s demands and life style change
A good example is smart phones, which are becoming more and more complicated and resource demanding. It is one reason why the technological advancements scaling enable the integration of different processing elements, input/output components, and memories on a single silicon die to form a SoC [1]. ese SoCs are based on very small components, MOSFETs [2] (Metal Oxide Semiconductor Field Effect Transistor), whether the downscaling is still the most effective way for achieving low power consumption and high performances as long as the chip area is kept constant
We present static and dynamic power models and temperature estimation implemented in an open virtual platform LIBTLMPWT [6], in which the temperature computations are done by the ATMI [7] (Analytical Model of Temperature in Microprocessors) library, based on running different benchmarks to grab the software effect on the hardware part while changing the technology node

Summary

Introduction

The demand for advancing the type of technology we use is high as people’s demands and life style change. We present static and dynamic power models and temperature estimation implemented in an open virtual platform LIBTLMPWT [6], in which the temperature computations are done by the ATMI [7] (Analytical Model of Temperature in Microprocessors) library, based on running different benchmarks to grab the software effect on the hardware part while changing the technology node.

Results

Conclusion