Copper impurities and their annealing behaviour in FZ silicon

Abstract

The electrical activity of copper as well as its annealing behaviour in p-type 10 Ωcm FZ silicon substrate are studied by means of four-point probe and lifetime measurements. While copper concentration in the range 1015 to 1016 cm−3 has little or no effect on the active carrier concentration of the material, it has a devastating effect on the lifetime of minority carriers by the formation of deep-level traps. The analysis of our results shows that only a small fraction of the copper impurity atoms present form this deep-level defect. In this impurity concentration range, copper does not seem to form complexes with the usual p-type impurity in silicon. The possible mechanism of defect recovery under time dependent annealing is discussed in the light of improved lifetime values without change in the resistivity values of copper contaminated specimens.