Coping with process variations in ultra-low power CMOS analog integrated circuits

Abstract

Ultra-low power analog/RF CMOS circuits are critical for battery-operated electronics. Low-supply voltage and current requirements are met by operating MOS transistors in weak to moderate inversions and very small overdrive voltages. The advantage of this technique comes with the price of complex and aggressive design burdens to be achieved. Therefore designers should have control over the behavior of their circuits such as the process, supply, and temperature variations. This paper presents a technique, which dynamically adjusts the threshold voltage to overcome the process and supply variation. Proposed technique (DTMOS) is used for digital and analog/RF designs. The simulation results show that with the proposed technique the variations in drain current and transconductance due to uncertainty of the process parameters and voltage deviations in the power supplies could be successfully compensated.