Conveyer Belt Model to Analyze Cycle Time Conditions in a Semiconductor Manufacturing Line

Abstract

It is indispensable to observe and control cycle time and throughput in a semiconductor manufacturing line to achieve competitive semiconductor manufacturing. It is especially important to control cycle time because any events in the line can cause delay in the cycle time and it becomes impossible to remedy the delay. We previously reported that lot arrival intervals could affect normalized cycle time (X-factor) and that this was an important factor to determine cycle time in a semiconductor manufacturing line (Inoue et al. (2005). This time, we created a new model that observes cycle time conditions and is useful for analyzing cycle time degradation on a manufacturing line. We call it a conveyer belt model and have found that it is valuable when visualizing and analyzing cycle time conditions. The proposed new model combined with queue time theory gives us an effective analysis of cycle time. As a result, this model is effective in the pursuit of cycle time design.