Abstract
A static CMOS circuit that converts a redundant binary representation into a two's complement representation is presented. The structure and time delay of the resulting logic are identical to a standard carry look-ahead logic for adders. The resulting layout is very regular, has no diffusion gaps and can be expanded to any desired look-ahead length. The circuit can be used for both multiplication and division.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.