Abstract
Hot-carrier-induced device degradation in n-type high-voltage drain-extended MOS (DEMOS) devices stressed under high drain voltage and high gate voltage ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Vg</i> ) is investigated. Charge pumping data and technology computer-aided-design simulation results reveal that hot-carrier-induced interface state formation in the gate overlapped shallow trench isolation region is responsible for device degradation. Furthermore, an unexpected high saturation region drain current ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Id</i> (sat)) degradation (close to on-resistance degradation) is observed. The occurrence of quasi-saturation under high <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Vg</i> bias is the cause of significant <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Id</i> (sat) degradation. The results presented in this paper suggest that severe <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Id</i> (sat) degradation may become a reliability concern for devices exhibiting the quasi-saturation phenomenon.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
