Controlling of Floating-Body and Thermal Conductivity in Short Channel SOI MOSFET at 30 nm Channel Node

Abstract

Ultra low-power Silicon-on-Insulator (SOI) transistor makes it possible to lower the supply voltage and reduce the power dissipation. However, these SOI MOSFET are still suffering from short channel effects (SCEs), the floating body effect (FBE) and self-heating effects (SHEs). In order to attenuate these problems, a new structure has been introduced and analyzed in this paper. The leakage current is minimized by using wide band gap material (GaP) and modifying buried oxide layer (SiO2-Si3N4-SiO2) in 30 nm channel node SOI MOSFET. The high thermal conductivity HfO2 and Si3N4 material being applied in the mentioned structure that helps to reduce the maximum temperature and controls self-heating effects. Also, the extra floated holes in the active region is reduced by a new N+-P+ diode created at the interface of the N+ source region and P+ silicon layer resulting in control FBE. The other important parameters like SS, gm, Ion/Ioff ratio, Vth, DIBL of an SOI MOSFET are studied to increase reliability of the device. The experimental data and the proposed SOI structure are simulated by using device simulator sentaurus TCAD for analysis purpose. The analyzed results of this work are useful for device optimization in future prospect. Extracted numerical outcomes make an evidence to replace conventional SOI by the modified structure.