Abstract

Multi-threshold CMOS (MTCMOS) is a commonly used technique to lessen the sub-threshold current in a non-operatory mode of any VLSI circuits. Commonly used MTCMOS technique cannot be straightforwardly used in a sequential circuit because of the lack of data retention capabilities in non-operatory mode. Herein a new design is proposed to store data when the circuit is in non-operatory mode. Analysis of mode transition noise on the ground line is also performed. Mode transition noise is nothing but fluctuations that occurred at the ground rail during non-operatory mode to operatory mode transition. This noise comes into the picture when there is a sudden decrease in ground potential. The proposed technique is applied to a 4-bit shift register. The simulation result showed a small variation on ground rail voltage in mode transition from non-operatory mode to active mode. Decreases in ground line fluctuation could be attributed to stepwise discharge of ground rail. Leakage current in non-operatory sleep mode is also calculated. The additional current control circuit in the proposed design provides data retention, as well as leakage minimization capabilities in sleep mode. The proposed design reduces ground rail fluctuations (mode transition noise) up to 70% as compared to similar techniques.

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