Abstract
In this brief, we demonstrate for the first time that the presence of a hybrid channel, which consists of a p+ layer below the n+ active device layer in a junctionless (JL) FET, leads to a drastically reduced BTBT-induced parasitic BJT action. Using calibrated 2-D simulations, we show that the JLFET with a p+ layer [which we call hole sink (HS)] has a significantly low OFF-state leakage current due to an increased tunneling barrier width, an enhanced source-to-channel barrier height, and a better provision for collecting the band-to-band tunneling (BTBT) generated holes, which results in a diminished parasitic BJT action in the OFF-state. Further, the proposed HS JLFET shows an extremely high ON-state to OFF-state current ( $I_{\mathrm{\scriptscriptstyle ON}}/I_{\mathrm{\scriptscriptstyle OFF}}$ ) ratio of $\sim 10^{7}$ for a channel length of 10 nm and a significant ( $I_{\mathrm{\scriptscriptstyle ON}}/I_{\mathrm{\scriptscriptstyle OFF}}$ ) ratio of $\sim 10^{4}$ even for a channel length of 5 nm.
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