Abstract
The scheme of controlled collapse reflow chip joining has been investigated again and extended to the package of Josephson device chips. Low temperature ternary eutectic (In/Bi/Sn) alloy is selected as the solder material which melts at 60°C. An interface metallurgy of Pd/Au was used as an interface layer bridging superconducting Nb pads and the solder. Indium stand‐offs are used for controlling collapse and providing constant spacing between chips and carrier modules. Mechanical and electrical test vehicles were fabricated and evaluated.
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