Abstract

Various studies on multi-valued-logic (MVL) computing, which utilizes more than two logic states, have recently been resumed owing to the demand for greater power saving in the current logic technologies. In particular, unlike old-fashioned researches, extensive efforts have been focused on implementing single devices with multiple threshold voltages via a negative-differential current change phenomenon. In this work, we report a multiple negative-differential-transconductance (NDT) phenomenon, which is achieved through the control of partial gate potential and light power/wavelength in a van-der-Waals (vdW) multi-channel phototransistor. The partial gating formed a controllable potential barrier/well in the vdW channel, enabling control over the collection of carriers and eventually inducing the NDT phenomenon. Especially, the strategy shining lights with different powers/wavelengths facilitated the precise NDT control and the realization of the multiple NDT phenomenon. Finally, the usability of this multiple NDT device as a core device of MVL arithmetic circuits such as MVL inverters/NAND/NOR gates is demonstrated.

Highlights

  • With the advent of a hyper-connected society based on the Internet-of-Things, where more than one trillion objects are connected with each other via the Internet, the amount of data to be handled and the processing power consumption are expected to increase rapidly[1,2,3,4]

  • We reveal the operating principle of the partial gate (PG)-negativedifferential transconductance (NDT) device by performing detailed analyses using three-dimensional (3D) atomic force microscopy (AFM), Raman spectroscopy, crosssectional transmission electron microscopy (X-TEM), energydispersive X-ray spectroscopy (EDS), temperature-dependent electrical measurement, and Kelvin probe force microscopy (KPFM)

  • Voltage increases in the positive or negative direction, the energy The results of the EDS analysis near the partially defined gate band corresponding to part of the van-der Waals (vdW) channel shifts down or up, electrode are provided in Supplementary Fig. 3

Read more

Summary

INTRODUCTION

With the advent of a hyper-connected society based on the Internet-of-Things, where more than one trillion objects are connected with each other via the Internet, the amount of data to be handled and the processing power consumption are expected to increase rapidly[1,2,3,4]. Shim et al.[21] reported a black phosphorus (BP)/rhenium disulfide (ReS2) heterojunction-based MVL device exhibiting the NDR phenomenon They implemented a ternary inverter circuit that processes three logical states by adding a load device to the MVL device. Nourbaksh et al.[22] and Shim et al.[23], respectively reported molybdenum disulfide (MoS2)/tungsten diselenide (WSe2) and graphene/WSe2 heterojunction-based MVL devices featuring the NDT phenomenon They demonstrated a ternary inverter circuit with a stable intermediate state, which was achieved by appropriately matching the I−V characteristics of NDT device with those of a p-channel load device. Beyond such a ternary logic regime, a quaternary logic device and circuit were recently reported by Lim et al.[17] They implemented a WS2–graphene– WSe2 heterojunction MVL device that exhibits a double-peak NDT phenomenon and subsequently demonstrated the feasibility of a quaternary inverter configured with the double NDT device and pchannel load transistor.

RESULTS
PG-NDT device
METHODS
Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call