Abstract
Prolonging the lifetime of Cu as a level 1 and level 2 interconnect metal in future nanoelectronic devices is a significant challenge as device dimensions continue to shrink and device structures become more complex. At nanoscale dimensions Cu exhibits high resistivity which prevents its functioning as a conducting wire and prefers to form non-conducting 3D islands. Given that changing from Cu to an alternative metal is challenging, we are investigating new materials that combine properties of diffusion barriers and seed liners to reduce the thickness of this layer and to promote successful electroplating of Cu to facilitate the coating of high-aspect ratio interconnect vias and to allow for optimal electrical conductance. In this study we propose new combined barrier/liner materials based on modifying the surface layer of the TaN barrier through Ru incorporation. Simulating a model Cu29 structure at 0 K and through finite temperature ab initio molecular dynamics on these surfaces allows us to demonstrate how the Ru content can control copper wetting, adhesion and thermal stability properties. Activation energies for atom migrations onto a nucleating copper island allow insight into the growth mechanism of a Cu thin-film. Using this understanding allows us to tailor the Ru content on TaN to control the final morphology of the Cu film. These Ru-modified TaN films can be deposited by atomic layer deposition, allowing for fine control over the film thickness and composition.
Highlights
The size of transistors in electronic devices is steadily decreasing, keeping Moore’s law on track into the 2020s
All calculations begin with a 2D structure of Cu29 adsorbed on the various Ru-modified TaN surfaces and we explore how the structure evolves during 0 K relaxations and MD simulations at finite temperatures
This is motivated by the findings that upwards migration of a metal atom from the surface layer can promote the further migration of metal atoms from the surface, enhancing island formation.[47]
Summary
The size of transistors in electronic devices is steadily decreasing, keeping Moore’s law on track into the 2020s. Present is a liner material (which is referred to as a seed layer, glue layer or adhesion promoter) that facilitates the electroplating of a smooth Cu thin film, Figure 1. [3,4,5,6] Otherwise copper tends to form non-conducting islands.[3,7,8]. As the dimensions of transistor devices decrease, this setup becomes problematic. Difficulties arise in depositing two additional layers of material and the Cu interconnect in the high aspect ratio interconnect via.[10] Further, Cu has significantly increased resistivity at such small scales[11,12] as a result of forming non-conducting islands rather than smooth conducting films.
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