Abstract
This paper deals with the control of current phase advancing in single-leg voltage source inverters (VSI) and matrix converters with a two-phase output. The phase shift of the current in the auxiliary phase is set with the use of switched capacitors. Two distinctive control methods are used for the current phase advancing, open-loop control and closed-loop control. In addition, a new averaging method is derived for the calculation of the switched capacitance used in the open-loop control. The practical use of the designed control methods with the switched capacitor is shown in simulations and experimental verifications on a single-leg matrix converter with a passive and active load (induction motor).
Highlights
A topology of the single-leg matrix converter (MxC) is derived from a single-leg voltage source inverters (VSI) converter system with input rectifier [1,2,3]
Emitter connected insulated-gate bipolar transistors (IGBT) transistors were used as bidirectional switches for the single-leg matrix converter output and for the switched capacitors
This paper brings analysis, modeling, computer simulation, and experimental verification of an enhanced one-leg two-phase matrix converter by a switched capacitor supplied by a symmetrical two-phase network with a neutral point
Summary
A topology of the single-leg matrix converter (MxC) is derived from a single-leg VSI converter system with input rectifier [1,2,3]. The use of switched capacitors has been previously published for VSI supply systems in [10,11,12], for single-leg VSI in [7], and for single-phase VSI in [7,11] All these applications with switched capacitors are derived for steady state with real-time closed-loop control. For a single-leg matrix converter, the use of switched capacitors is described in the authors’ recent work [8,9] These MxC or VSI converters require controlling the capacitance due to the single-leg output of the converter when using two-phase passive or active loads. The closed-loop control of current phase shift is inspired by the phase-locked loop
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