Control of Arsenic Doping during Low Temperature CVD Epitaxy of Silicon (100)

Abstract

In situ arsenic doping during chemical vapor deposition (CVD) epitaxy of silicon is investigated. At low temperatures (around 700°C), a high arsenic concentration accumulates on the silicon surface. With a hydrogen bake (at 950°C) the surface concentration is significantly reduced and autodoping is inhibited. After the bake, the capping layer is grown at 700°C. At this temperature, the arsenic segregation, back to the surface, is suppressed. With this procedure, a relatively low baking temperature of 950°C is sufficient to reduce the autodoping level below . Solid‐state diffusion of the underlying arsenic profile is relatively slow at this temperature. This allows the fabrication of very sharp arsenic doping profiles. It is also shown that the arsenic surface concentration is proportional to the concentration that is incorporated into the epi layer. Furthermore it is shown that, in contrast to (kinetically limited) silicon growth, the arsenic transport is limited by gas‐phase diffusion at 700°C, making the doping level dependent on pressure, temperature, and hydrogen flow. © 2000 The Electrochemical Society. All rights reserved.