Contribution of Interface State and Bulk Damages to the Dark Current Increase in SOI Pixel Sensor with Pinned Depleted Diode Structure

Hisanori Suzuki,Kazuhiko Hara,Ikuo Kurachi

doi:10.1109/nss/mic44867.2021.9875831

Abstract

In the Silicon-On-Insulator (SOI) pixel detectors, the interface between the sensor silicon and the buried-oxide (BOX) layer contributes to the dark current increase. A Pinned Depleted Diode (PDD) structure, that fixes the potentials on the sensor surface and suppresses the formation of a depletion layer at the interface, significantly reduces the dark current. However, we find the radiation induced dark current increase still remains as an issue. Therefore, test chips containing PDD-SOI pixels (pixel size 36 μm square and 300 μm substrate thickness) and sub MOSFETs of which gate insulator is the BOX layer were irradiated to protons to the fluence of 9.63 × 10 13 n <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eq</inf> /cm 2 and 5.02 × 10 14 n <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eq</inf> /cm 2 . The increases of interface trapped charges and charges trapped in the BOX layer were observed by the analysis of sub MOSFET characteristics. The pixel leakage current, which amounted to 0.6 nA/pixel and 4.0 nA/pixel for the two fluences after irradiation, recovered by the isochronal annealing process conducted from 80°C to 300°C for 30 min each. It was also observed that the interface trapped charge and oxide trapped charge densities are mostly recovered by this annealing, and the residual leakage current after annealing (0.04 nA/pixel and 0.11 nA/pixel) is caused by the bulk damages.

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