Contrast of latch-up induced by pulsed gamma rays in CMOS circuits after neutron irradiation and TID accumulation

Abstract

We investigate the difference in the probability of latch-up occurrence in complementary metal–oxide–silicon (CMOS) circuits exposed to neutron radiation and total ionizing dose (TID), which are subsequently exposed to pulsed gamma rays. First, we irradiate three types of CMOS circuits in a reactor for neutron exposure and in a Co-60 unit for TID exposure respectively, which are then placed in a pulsed gamma-ray environment. The latch-up induced by pulsed gamma-ray irradiation is studied. Our experimental results indicate that the manifestation of the latch-up phenomenon is different among the devices after neutron irradiation and TID exposure, thereby indicating that the influences of neutron and TID exposures on the latch-up sensitivity are different. To understand how the latch-up sensitivity changes, we study a dynamic model for latch-up occurrence and analyse the influences of neutron and TID exposure using the model. Our results indicate that neutron injection reduces the susceptibility of latch-up occurrence, whereas TID exposure increases the latch-up occurrence susceptibility. Therefore, in the case of CMOS circuits exposed to pulsed gamma-ray irradiation, the latch-up threshold decreases with TID accumulation, but increases with neutron fluence augmentation. Interestingly, the latch-up threshold drops when the neutron fluence is sufficiently large, mainly because concomitant gamma rays in the reactor environment play an important role in affecting the threshold.