Abstract
This paper addresses the communication modelling and synthesis problem for applications implemented on networks-on-chip (NoC). Due to the communication complexity of such systems it is difficult to estimate the communication delay, making implementation of real-time systems on NoCs virtually impossible. In this work we propose a method for simple and efficient communication modelling and synthesis for dynamically reconfigurable NoC-based systems that enables contention aware scheduling. The network model is refined such that produced schedules can be verified with a cycle-accurate simulator.
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