Contamination issues in hydrogen plasma immersion ion implantation of silicon—a brief review

Abstract

Hydrogen plasma-immersion ion implantation (PIII) is an effective technique to fabricate silicon-on-insulator (SOI) and conduct microcavity engineering. Unlike metallurgical applications, the introduction of a trace amount of contaminants, such as transition metals, into the silicon wafers can seriously compromise the product yield and device performance. In PIII experiments, ions bombard all surfaces inside the PIII vacuum chamber, especially the negatively pulsed biased sample stage and to a lesser extent the interior of the vacuum chamber. Consequently, impurities are sputtered from these exposed surfaces and can be re-implanted into or absorb onto the semiconductor wafers. In hydrogen PIII, which is the first step in the PIII/ion-cut process to synthesize SOI wafers, the need for sample cooling makes the design and construction of an all-silicon sample chuck technically difficult. In this review, recent theoretical and experimental work conducted on identifying the sources of metallic contamination, quantifying the extent of contamination, as well as means to mitigate atmospheric and metallic contamination is reviewed. The results suggest that the use of an all-silicon liner and silicon guard-ring dramatically allays the severity of metallic contamination. However, the use of single-crystal silicon as the guard-ring or coating material is not preferred, because the materials blister after hydrogen implantation and particles are released into the vacuum chamber. Three silicon-compatible materials are proposed, and experimental results indicate that a thin silicon oxide coating has the highest immunity to hydrogen-induced surface blistering, while having a minimal affect on the surrounding electric field.