Constant-g/sub m/ constant-slew-rate high-bandwidth low-voltage rail-to-rail CMOS input stage for VLSI cell libraries

Abstract

This paper introduces a general-purpose low-voltage rail-to-rail input stage suitable for analog and mixed-signal applications. The proposed scheme provides, simultaneously, constant small-signal and large-signal behaviors over the entire input common-mode voltage range, whilst imposing no appreciable constraint for high-frequency operation. In addition, the technique does not rely on any strict matching condition between complementary differential pairs, and is compatible with deep submicron CMOS devices, where the familiar voltage-to-current square-law in saturation is not completely satisfied. Experimental results on integrated prototypes are provided.