Connection autonomy in SIMD computers: A VLSI implementation

Abstract

Fine-grain SIMD (single instruction stream-multiple data stream) parallel architectures exhibit very high performance in a variety of application fields (such as vision, scientific computing, geometric modeling, and artificial intelligence) mainly because of the massive data parallelism. It is, however, desirable to increase the autonomy of the SIMD architecture for further efficiency. For example, with operation autonomy different processors are able to execute different operations, while with address autonomy, each processor can fetch data from memory locations different from the other processors. Because of the quantity (i.e., tens of thousands) and the simplicity (e.g., bit-serial) of the processors in fine-grain SIMD system, these autonomies may be too expensive to justify their benefits. Nevertheless, one type of autonomy, connection autonomy, is extremely beneficial and is economic in VLSI implementation. We investigate connection autonomy for fine-grain SIMD parallel architecture in this paper by showing a model for connection autonomy, the utilization of connection autonomy, and its VLSI implementation. The architecture and the instruction set of the YUPPIE system (Yorktown ultra parallel polymorphic image engine) are presented and some programming examples are given. We show that, by adding 20% silicon area over each processor, connection autonomy can deliver orders of magnitude of performance improvement over the same network without connection autonomy.