Abstract
A new procedure to extract the parameters of mathematical models that describe charge flow phenomena through thin dielectrics is proposed for characterizing undesirable leakage current mechanisms in modern MOSFETs’ gates. The procedure’s basis is the small signal conductance-to-current ratio of the $I$ – $V$ characteristics. It is an alternative to, and has advantages over, the other presently used methods that extract those models’ parameters from the slope and intercept of phenomenon-specific linear plots. In contrast, this is a generic method that may be directly applied to the $I$ – $V$ characteristics, regardless of the specific leakage mechanism involved. The procedure inherently reduces by one the number of unknowns that needs to be determined during numerical optimization. In addition, it does not require, as other traditional methods do, a prior knowledge of the exact relationship between the applied voltage and the effective internal electric field strength, which in this case is determined together with the other parameters. The procedure is illustrated by three examples with different kinds of data: mathematically synthesized, Computer Aided Design simulated, and experimentally measured leakage $I$ – $V$ characteristics of MOS capacitors.
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