Abstract
The stacks of III-V materials, grown on the Si substrate, that are considered for the fabrication of highly scaled devices tend to develop structural defects, in particular threading dislocations (TDs), which affect device electrical properties. We demonstrate that the characteristics of the TD sites can be analyzed by using the conductive atomic force microscopy technique with nanoscale spatial resolution within a wide temperature range. In the studied InGaAs/Si stacks, electrical conductance through the TD sites was found to be governed by the Poole-Frenkel emission, while the off-TDs conductivity is dominated by the thermionic emission process.
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