Concurrent Online Test Architecture for Multiple Controller Blocks with Minimum Fault Latency

Abstract

A test architecture to perform online testing for multiple blocks concurrently is presented in this paper. The test architecture is based on monitoring output vectors of the blocks and concurrently detecting faults. The scheme works well for critical VLSI controllers where shutting down or suspending the operation of a controller for testing is not possible and where the fault needs to be detected at the earliest, during the run time of the system. The applicability of the architecture for the control blocks in OC8051 has been demonstrated. To the best of our knowledge, the proposed architecture for concurrent online testing on multiple blocks with just a few cycles of fault latency is presented for the first time in open literature.