Concepts of parallelism in an introductory computer architecture courses with FPGA laboratories

Abstract

The introductory course in computer architecture or machine organization required of most electrical and computer engineering students has evolved substantially in recent years as technological advances have led to ever increasing processor sophistication. In most cases the introductory course is still built around traditional instruction set architectures (ISA) using actual or simulated processors. However the future will require that working engineers be able to effectively use highly integrated distributed arrays of computational resources. With the widespread use of field programmable gate arrays (FPGA) in student laboratories, it is now possible to introduce basic concepts of parallel structures, such as those used in special purpose high performance graphics processing or digital signal processing, without confronting the complex communication and synchronization issues associated with arrays of processors. An introductory architecture course has been modified to include concepts of parallel structures as well as traditional ISAs. The same FPGAs that can be used to create a simple processor with a basic instruction set can also be used to implement simple structures for parallel computation. Although the design methodology and performance evaluations for these parallel designs are not as mature as the traditional ISA based design, it is still possible to introduce perspectives of parallel design in the introductory course. This paper describes the course and some of the laboratory experience.