Compute resource management and TAT control in mask data prep

Abstract

With each new process technology node chip designs increase in complexity and size, and mask data prep flows require more compute resources to maintain the desired turn around time (TAT). In addition, to maintaining TAT, mask data prep centers are trying to lower costs. Securing highly scalable processing for each element of the flow - geometry processing, resolution enhancements and optical process correction, verification and fracture - has been the focal point so far towards the goal of lowering TAT. Processing utilization for different flow elements is dependent on the operation, the data hierarchy and device type. In this paper we pursue the introduction of a dynamic utilization driven compute resource control system applied to large scale parallel computation environment. The paper will explain the performance challenges in optimizing a mask data prep flow for TAT and cost while designing a compute resource system and its framework. In addition, the paper will analyze performance metrics TAT and throughput of a production system and discuss trade-offs of different parallelization approaches in data processing in interaction with dynamic resource control. The study focuses on 65nm and 45nm process node.