Abstract
A cascaded integrator-comb (CIC)-based decimator is proposed, which consists of an area-efficient structure aided with an embedded simplified Chebyshev-sharpened section. Taking traditional CIC filters as a reference, the proposed scheme fulfils two important goals: (i) it improves the worst-case aliasing rejection and (ii) it preserves a low-complexity design that requires fewer hardware resources and consumes less power. The proposed system exhibits regularity, a desirable characteristic not present in other CIC-based recent methods from literature that have pursued the same goals.
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