Abstract
Transient simulation of complex converter topologies is a challenging problem, especially in detailed analysis tools like SPICE. Transistor models presented for SPICE are often evaluated by accuracy, with less consideration for the computational cost of model elements. In order to optimize models for application simulations, this research quantifies the relative simulation performance of modeling approaches and contextualizes the results with regard to accuracy. It is well established that the primary contributor to semiconductor dynamic behavior is the voltage-dependent interelectrode capacitances. Therefore, this study isolates these model components to resolve their influence on model accuracy and run-time. Both the voltage-dependencies modeled, and the mathematic formulation chosen strongly influence the accuracy of interelectrode capacitance models. In addition to these factors, the specific implementation chosen within SPICE also determines simulation performance. Through careful evaluation of these factors, this study offers specific recommendations for optimal implementations of interelectrode capacitances in SPICE.
Highlights
System models are a vital tool in the development of power electronic applications; they allow designers to optimize system performance [1], analyze electromagnetic compatibility (EMC) [2], and reduce the number of hardware iterations [3], [4]
This paper presents an extension of prior work presented in [10], in which the tradeoffs between accuracy and simulation run-time were evaluated for MOSFET conduction models in SPICE
The present paper provides additional analysis of the literature through a detailed investigation of various interelectrode capacitance models that have been presented for SiC MOSFETs
Summary
System models are a vital tool in the development of power electronic applications; they allow designers to optimize system performance [1], analyze electromagnetic compatibility (EMC) [2], and reduce the number of hardware iterations [3], [4]. This paper presents an extension of prior work presented in [10], in which the tradeoffs between accuracy and simulation run-time were evaluated for MOSFET conduction models in SPICE In this previous study, several candidate models were evaluated in SPICE. This paper identifies and catalogs the fundamental interelectrode capacitance implementations available to model designers and demonstrates the accuracy and run-time performance tradeoffs between them. It quantifies the performance of widely used variable capacitance implementations. This work emphasizes computational efficiency and convergence, so switched capacitance models [27], [28], [29] are likewise considered out of scope
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