Computation with Domain Walls and Oscillators in Chirally Coupled Systems

Abstract

In order to go beyond the traditional CMOS logic technology, novel spin-based logic architectures are being developed to provide nonvolatile data retention, near-zero leakage, and scalability. In particular, architectures based on magnetic domain walls take the advantage of the fast motion, high density, non-volatility and flexible design of domain walls to process and store information in three dimensions [1,2]. Such logic schemes have so far relied on domain wall manipulation and clocking using an external magnetic field, which hinders their industrial implementation. Here we demonstrate a method for performing all-electric logic operations and cascading using domain wall racetracks [3].Our concept is based on the recently developed chiral coupling mechanism between adjacent magnets where the magnetic anisotropy competes with the interfacial Dzyaloshinskii–Moriya interaction (DMI) in Pt/Co/AlOx trilayers [4,5]. When a narrow in-plane (IP) magnetized region is incorporated into an out-of-plane (OOP) magnetized track, it couples to its surrounding, leading to the antiferromagnetic alignment of the OOP magnetization on the left and right of the IP region. This is enforced by interfacial DMI favouring a fixed magnetization winding direction, which is left-handed in our Pt/Co/AlOx trilayers. When a current-driven domain wall propagating in the track encounters such a region, the magnetization of the IP regions flips, leading to the annihilation of the incoming domain wall and the nucleation of a new domain wall of opposite polarity on the other side of the IP region (Fig. 1a). The chiral OOP-IP-OOP structure therefore serves as a domain wall inverter, the essential building block for all implementations of Boolean logic. Based on this principle, we fabricated reconfigurable NAND and NOR logic gates, making our concept for current-driven DW logic functionally complete. We also cascaded several NAND gates to build XOR and full adder gates, demonstrating electrical control of magnetic data and device interconnection in logic circuits (Fig. 1b). The functionality of logic circuits can be also expanded by the realization of a domain wall diode based on a geometrically tailored inverter [7].We also broadened the application of chiral coupling towards dynamic computation with oscillators [8]. By imprinting the magnetic configuration of an IP magnetized disk in an OOP magnetized slab containing sizeable DMI, a chiral polar vortex texture can be established as a ground state in the patterned region (Fig. 2a). By means of micromagnetic calculations, we show that such an oscillator can be driven and manipulated by an injected spin current. We investigated the mutual synchronization of such oscillators via spin wave and dipolar interactions (Fig. 2b) and demonstrated their potential for neuromorphic computing with a neural network of six oscillators.  Fig. 1. Current-driven DW logic. (a) Schematic of current-driven DW inversion, occurring as the DW moves across the in-plane region. After selective oxidization, the magnetizations of neighboring OOP and IP regions align with a left-handed chirality in Pt/Co/AlOx. Here a down│up DW is inverted to an up│down DW. (b) Left panel: Schematic of a full adder gate obtained by cascading several NAND gates. Right panel: Full adder gate with “a=0” and “b=1” inputs resulting in “Sum=1” with a “Carry = 0”.  Fig. 2. Computation with chiral oscillators. (a) Equilibrium magnetic texture in the DMI-based nano-oscillator with 100 nm diameter. The oscillator has two equivalent states, depending on the magnetization direction in the OOP region. Magnetization along the +z and –z direction is indicated in white and black, while the IP magnetization direction is given by the color wheel. (b) Synchronization pattern of two oscillators separated by 60 nm distance. The current density in the left oscillator is fixed (j1=0.8×109 A/m2), while the current density of the oscillator on the right (j2) is swept.