Abstract
Computation of error in estimation of nonlinearity in ADC using histogram test are reported in this paper. Error determination in estimation of Differential Nonlinearity (DNL) and Integral Nonlinearity (INL) of an ADC is done by taking deviation of estimated value from actual value. Error in estimated INL and DNL is determined to check the usefulness of basic histogram test algorithm. Arbitrary error is introduced in ideal simulated ADC transfer characteristics and full scale simulated sine wave is applied to ADC for computation of error in estimation of transition levels and nonlinearity. Simulation results for 5 and 8 bit ADC are pre-sented which show effectiveness of the proposed method.
Highlights
Real life signals are analog in nature and in order to interface them with digital processing systems it is necessary to convert them in digital using ADC
Ideal ADC transfer characteristics for 5 and 8 bit resolution are simulated and arbitrary nonlinearity error is introduced in their transfer characteristics
In first case using standard histogram technique code transition levels are computed after introducing Differential Nonlinearity (DNL) error in ADC transfer characteristics
Summary
Histogram technique is very popular for testing an ADC to determine several parameters of interest namely, INL, DNL, ENOB, gain error and offset error. Work on determination of error in estimation of code transition levels and computation of variance in gain and offsets has been published [3,4]. DNL, INL and ENOB are determined based on code transition levels of ADC transfer characteristics [7,8]. In this paper our contribution is in determination of error in estimation of DNL and INL.
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