Computation complexity analysis and VLSI architectures of shape coding for MPEG-4

Abstract

There are huge bit-level operations in shape coding algorithms for MPEG-4. These bit-level operations make it difficult to implement real-time MPEG-4 coding in the general-purpose processor without any hardware support. This paper first gives the analysis of computation complexity in MPEG-4 shape coding algorithms. Then a dedicated VLSI architecture to accelerate shape coding, which is called Shape Engine, is proposed. Shape Engine is composed of three dedicated but flexible processors element (PE) namely PB-PE, Filtering-PE and CAE-PE. The combination of RISC core and Shape Engine leads to a great speed up over pure software implementation of MPEG-4 shape coding.