Composite TiSi/sub 2//n+ Poly-Si Low-Resistivity Gate Electrode and Interconnect for VLSI Device Technology

Abstract

A composite polycide structure consisting of refractory metal silicide film on top of polysilicon has been considered as a replacement for polysilicon as a gate electrode and interconnect line in MOSFET integrated circuits. This paper presents fine-line patterning techniques and device characteristics of MOSFET's with a TiSi/sub 2/ polycide gate. A coevaporated TiSi/sub 2/ polycide gate was chosen for this study because it had 2 to 5 times lower resistivity as compared to other silicides. Polycide formation by electron-beam coevaporation is chosen in preference to sputtered TiSi/sub 2/ because of lower oxygen contamination. The coevaporation technique to form TiSi/sub 2/ polycide with a sheet resistivity of 1 Omega/square (bulk resistivity of 21 µOmega · cm) is described. Anisotropic etching of nominally 1-/spl mu/m lines with a 15 : 1 etch selectivity against oxide is reported. Measurements of metal-semiconductor work function, fixed oxide charge density, dielectric strength, oxide defect density, mobile-ion contamination, threshold voltage, and mobility have been made on polycide structures with 25-nm gate oxides. These MOS parameters correspond very closely to those obtained for n+ poly-Si gates. In addition, the specific contact resistivity between Al and TiSi/sub 2/ polycide is lower than the contact resistivity between Al and polysilicon by one order of magnitude.