Abstract
This paper presents a new scheme for evaluating complex reciprocal and exponential functions in hardware. The proposed method utilizes a two-dimensional convolution algorithm to interpolate bivariate functions from tabulated function values in the complex domain. To reduce the memory requirements for lookup tables, the interpolation is decomposed into independent row and column computations, such that the same coefficient table can be shared. Three different interpolation kernels from degree-1 (linear) to degree-2 (quadratic Lagrange) and degree-3 (cubic Lagrange) are explored to find the optimal design parameters and the most acceptable trade-offs between performance and hardware resources. Moreover, a generic hardware architecture is designed to provide scalable implementation capabilities for computation precision and interpolation degree. To verify the proposed architecture, eight complex reciprocal and eight complex exponential design instances are implemented. The ASIC- and FPGA-based experimental results show that the proposed scheme can efficiently approximate the complex reciprocal and exponential functions with up to 16-bit precision, as well as achieve a considerable reduction of memory requirements compared with traditional bipartite and multipartite schemes. The proposed method is also applicable to other complex functions.
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