Abstract
In this parper, a 4D absolute memristor Jerk chaotic system is proposed. Firstly, complex dynamics are studied by phase diagram, Poincaré section, power spectrum, bifurcation diagram, 0-1 test, and Lyapunov exponent spectrum. Then, the period doubling bifurcation, degradation, and offset boosting are revealed. For the feasibility of practical application, the analog circuit and FPGA digital circuit are designed. Finally, a simplified predefined time synchronization scheme is proposed; comparing with the full control input synchronization scheme, the simplified predefined time synchronization scheme can not only reduce the controller inputs but also predefine the synchronization time.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.