Complementary metal‐oxide semiconductor implementation of digital filters for signal processing applications

Abstract

Realisations of filters in signal processing using interconnects as delay elements have been presented. Normally, these filters are implemented using switched capacitor technique. However, in digital realisations of these filters, flip flops are used for obtaining the delays. Here, the implementation of these filters using interconnects has been presented. Moreover, filter architectures which acts as basic building blocks for other complex filter structures have been explored and discussed. Spice simulations of these basic building blocks are carried out using BSIM 4.3 50 nm technology with a supply voltage of 1 V.