Compiler Assisted Instruction Relocation for Performance Improvement of Cache Hit Rate and System Reliability

Abstract

Because the spatial and temporal locality of program codes, compiler could use heuristics and profile guided prediction to relocate the output of program codes to reduce the cache confliction. In this paper, for improving the average accessing time of memory subsystem by raising the cache hit rate, hybrid compiler assisted prediction and relocation techniques are proposed. Different with the traditional scheme that provide the fixed heuristics predication for various kinds of programs, the more elaborate scheme with command line direction and the markov based heuristics algorithm with different parameters is adopted for program prediction in this paper. As a result, the sequential instructions layout based on the executing probability and frequency ensures the benefit to cache hit rate and the fetch unit of processor, meanwhile in favour of the system reliability.