Abstract

This paper reviews implementations of competitive learning algorithms in digital VLSI circuits and systems, including recent results from our laboratory on neural circuits for efficient learning computations and for vector quantization. Digital circuits for competitive learning, especially those operating with low-power requirements, are currently important for their applications in computationally efficient speech and image compression by vector quantization, as required, for example, in portable multimedia terminals. A summary of competitive learning models is presented to indicate the type of VLSI computations required, and the effects of weight quantization are discussed. Circuit representations of computational primitives for learning and evaluation of distortion metrics by digital circuits are also reviewed. The present state of VLSI implementations of hard and soft competitive learning algorithms are discussed, as well as those for topological feature maps. Recent results are also presented from simulations of frequency-sensitive competitive learning concerning sensitivity of these algorithms to limited precision in VLSI learning computations. Applications of these learning algorithms to unsupervised feature extraction and to vector quantization are also described.

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