Compensation of the Parasitic Capacitance of a Scanning Force Microscope Cantilever Used for Measurements on Ferroelectric Capacitors of Submicron Size by Means of Finite Element Simulations

Abstract

New measurement techniques enable the electrical characterization of single ferroelectric capacitors with electrode areas below 1 µm2. This is in the range of the cell size of a typical capacitor in ferroelectric non volatile memory devices. Usually, a scanning force microscope (SFM) is used to contact these capacitors. However, a compensation procedure is necessary to extract the polarization of the capacitor material from the parasitic influence of the measurement setup. The subtraction of an open measurement with a lifted cantilever is not sufficient, because lifting the cantilever changes its parasitic capacitance to the bottom electrode of the wafer. Therefore, we developed a finite element model of a SFM cantilever to calculate its parasitic capacitance. This model enabled us to calculate the parasitic capacitance which has to be subtracted from the measurement data dependent on geometrical parameters of the cantilever and parameters defined by the measurement setup, e.g. the distance from the wafer in the lifted position. Our simulations show that the angle of the cantilever to the wafer surface has to be taken into consideration, whereas the size and shape of the cantilever tip can usually be neglected. The results lead to a simulation-enhanced compensation procedure which is applied for example on a measurement of a ferroelectric sample capacitor with an electrode area of 0.09 µm2. Furthermore, a triax shielding concept is proposed to reduce the main influence of the parasitic capacitance of the cantilever.