Abstract

Large time delay is one of the inherent features in modular multilevel converter (MMC) based high voltage direct current (HVDC) system. It is the main factor leading to the unfavorable ‘negative resistance and inductance’ characteristics of MMC impedance. Researches indicate that such unfavorable characteristics interacting with the capacitive characteristics of AC system is the reason causing high frequency resonances (HFRs) in YuE HVDC project. As the current controller is one of the main factors to shape the MMC impedance, a compensation control to imitate the paralleled impedance at point of common coupling (PCC) is proposed. Therefore, the structure and parameter design of the compensation controller are the core to realize HFRs suppression. There are two potential risky frequency ranges of HFRs (around 700Hz and 1.8 kHz) in the studied AC system within 2.0 kHz. The core concept of HFRs suppression is to make the phase angle of MMC impedance smaller than 90° in the two risky frequency ranges according to impedance stability theory. Hence, the parameters designing are to coordinate the phase angle of MMC impedance in the two risky frequency ranges. In this paper, three types of compensation controller are studied to suppress HFRs, namely, first-order low pass filter (LPF), second-order LPF, and third-order band pass filter. The results of parameters design show that the first-order LPF cannot suppress the both HFRs simultaneously. The second-order LPF can suppress the both HFRs. However, it will bring DC component into the current control loop. Therefore, a high pass filter is added to form the recommended third-order controller. All the parameter ranges of compensation controller are derived using analytical expressions. Finally, the correctness of the parameters design is proofed by the time-domain simulations.

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