Compensating Voltage Sag in Single Phase and Three Phase Lines Using Fault Current Limiter

Abstract

Voltage sag compensation is provided on both sides of the Point of Common Coupling (PCC) by using FACTS Devices (STATCOM, APF, DSTATCOM, DVR, UPFC) and FCL. The FACTS dev ices provide compensation on input side and FCL provides compensation on output side. A sensitive load is considered at output side of PCC. This paper presents a component called Fault Current Limiter (FCL) in three phase lines. The main objective of the designed component is to protect the sensitive load from the shunt faults. The compensation is being provided at output side of PCC. Load voltage reduces upon the occurrence of shunt fault. The planned structure prevents voltage sag and counter balance the phase-angle of the PCC once fault prevalence. As a result, different feeders which are interlinked to the sub-station PCC can have attentive power quality. During this paper a high performance 3-phase fault current electrical model is planned. The analysis and design is carried out in MATLAB with SIMULINK.