Abstract
The effects of temporary bonding processes on thin wafer handling were investigated. Backside dielectric curing process was found to be a critical process for the void formation in the thin wafer handling which was confirmed by scanning acoustic microscope and by thermo-gravimetric analyzer out-gassing analysis. The effects of voids on back-side wafer processes were discussed. Finally, 3-D through silicon via integration with thin wafer handling (50 μm in thickness) was demonstrated with selected dielectric passivation material and temporary bonding adhesives.
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