Abstract
Three-dimensional confinement of electrons in silicon-based nanodevices may be achieved using a dual gate structure to confine carriers laterally in a 2D MOSFET inversion layer. We have investigated the temperature stability of cobalt and chromium for thin depletion gates, using remote plasma enhanced chemical vapour deposited (RPECVD) for the deposited dielectric. The thermal stability of the oxide/metal/oxide structure for various annealing regimes was studied by Auger electron spectroscopy sputter profiling and high-resolution cross-sectional transmission electron microscopy. Improvements to the RPECVD oxide for comparable annealing were characterized by electrical measurements on MOS capacitors made from deposited RPECVD oxide.
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