Abstract
Compass is a SPMD (Single Program Multiple Data) tracking algorithm for the upcoming LHCb upgrade in 2021. 40 Tb/s need to be processed in real-time to select events. Alternative frameworks, algorithms and architectures are being tested to cope with the deluge of data. Allen is a research and development project aiming to run the full HLT1 (High Level Trigger) on GPUs (Graphics Processing Units). Allen’s architecture focuses on data-oriented layout and algorithms to better exploit parallel architectures. GPUs already proved to exploit the framework efficiently with the algorithms developed for Allen, implemented and optimized for GPU architectures. We explore opportunities for the SIMD (Single Instruction Multiple Data) paradigm in CPUs through the Compass algorithm. We use the Intel SPMD Program Compiler (ISPC) to achieve good readability, maintainability and performance writing “GPU-like” source code, preserving the main design of the algorithm.
Highlights
LHCb is one of the large four experiments in the LHC at CERN
We explore opportunities for the SIMD (Single Instruction Multiple Data) paradigm in CPUs through the Compass algorithm
When implementing an Intel SPMD Program Compiler (ISPC) program the variables that will run with different values across the vector lanes are explicitly indicated through the keywords uniform and variant, allowing the compiler to reason about the source code and produced a vectorized version
Summary
LHCb is one of the large four experiments in the LHC at CERN. From 2019 it started an upgrade of its components and software for the physics data-taking period that will start in 2021. Its software will need to compute a collision rate of 30 MHz which generates a data throughput of 40 Tb/s that needs to processed in real-time [1]. As a novelty its event filter farm will be powered solely by general purpose computing resources: a software trigger. The software trigger source code is being updated to cope with the increased throughput rate, as an increased compute power is needed to better exploit the hardware. Various hardware alternatives are being considered, with multi- and many-core CPUs, co-processors and accelerators included
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