Abstract
Abstract. In Adaptive Voltage Scaling (AVS) the supply voltage of digital circuits is tuned according to the circuit's actual operating condition, which enables dynamic compensation to PVTA variations. By exploiting the excessive safety margins added in state-of-the-art worst-case designs considerable power saving is achieved. In our approach, the operating condition of the circuit is monitored by in-situ delay monitors. This paper presents different designs to implement the in-situ delay monitors capable of detecting late but still non-erroneous transitions, called Pre-Errors. The developed Pre-Error monitors are integrated in a 16 bit multiplier test circuit and the resulting Pre-Error AVS system is modeled by a Markov chain in order to determine the power saving potential of each Pre-Error detection approach.
Highlights
In today’s advanced integrated circuits, with ever increasing performance demands, methods and schemes aiming to minimize power consumption in digital circuits are becoming more of a concern
The state-of-the-art worst-case guardbanding approach adds several safety margins considering Process, Voltage and Temperature variability and Aging (PVTA) to the supply voltage required for correct operation under nominal condition
Adaptive Voltage Scaling (AVS) controls the supply voltage according to the operating condition of the circuit by exploiting unused safety margins
Summary
In today’s advanced integrated circuits, with ever increasing performance demands, methods and schemes aiming to minimize power consumption in digital circuits are becoming more of a concern. The state-of-the-art worst-case guardbanding approach adds several safety margins considering Process, Voltage and Temperature variability and Aging (PVTA) to the supply voltage required for correct operation under nominal condition. The in-situ delay monitors are enhanced flip-flops providing information about the timing of the circuit. The AVS approach in Bowman et al (2009) and Das et al (2009) uses in-situ delay monitors capable of detecting timing errors. Wirnshofer et al (2011) use in-situ delay monitors that are able to detect critical transitions instead of error detectors These in-situ delay monitors, called Pre-Error flip-flops, are inserted at the end of critical paths in the circuit. The supply voltage is adjusted during normal operation of the circuit based on the timing information obtained by Pre-Error flip-flops.
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